You will be part of a high end technology project, with the goal to develop and verify complex digital SoC designs, implemented in ASIC.
Your responsibilities will be with focus top level integration.
The assignment is at Ericsson oremises in Stockholm. Full time, 6-12 months duration.
-Experienced in SystemVerilog and VHDL
-Previous experience from top level integration of IPs and high speed serial interfaces
-Attention to detail, structured Wow with solid VC experience (preferably ClearCase)
-Good written and verbal communication skills in English
Experience from agile methods and Secrum methodologies